Fast Simulation of VLSI Interconnects
Fast Simulation of VLSI Interconnects
J. Jain, C.-K. Koh and V. Balakrishnan
In Proc. International Conference on
Computer Aided Design,
San Jose, CA, November 2004, pp. 93-98.
Abstract: This paper introduces an efficient and accurate
interconnect simulation technique. A new formulation for typical VLSI
interconnect structures is proposed which, in addition to providing a
compact set of modelling equations, also offers a potential for
exploiting sparsity at the simulation level. Simulations show that
our approach can achieve 50X improvement in computation time and
memory over INDUCTWISE (which in turn has been shown to be 400X faster
than SPICE) while preserving simulation accuracy.
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