SASIMI: Sparsity Aware Simulation of
Interconnect-Dominated Circuits with Non-Linear Devices
SASIMI: Sparsity Aware Simulation of
Interconnect-Dominated Circuits with Non-Linear Devices
J. Jain, S. Cauley, C.-K. Koh and V. Balakrishnan
In Proc. ASPDAC, Yokohama, Japan, January 2006
Abstract:
We present a technique for the fast and accurate simulation of
largescale
VLSI interconnects with nonlinear devices, called SASIMI. The
numerical efficiency of this technique is realized through
linear-algebraic
techniques that exploit the sparsity and structure of the matrices
that are
encountered in VLSI structures. Numerical results show that SASIMI
is up to 1400 times as fast as commercial-grade SPICE, for
moderatesize
circuits, with little sacrifice in simulation accuracy.
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